The present invention relates to semiconductor devices and manufacturing methods for manufacturing semiconductor devices, and in one embodiment to vertical semiconductor devices.
In current power MOSFETs, also the reduction of gate-drain feedback capacity is becoming more and more important, apart from an on-resistance Rdson as small as possible. This capacity is substantially responsible for dynamic switching losses.
In an active cell field of such a power MOSFET formed as a trench transistor, this may be realized by introducing a source electrode under the gate electrode, for example. Both sorts of electrodes are realized of highly-doped polysilicon, for example. Regardless whether the gate electrode alone is present in the trench or whether a source electrode is additionally present under the gate electrode, which may also be referred to as “field plate”, the electrode in the trench must nevertheless be always contacted.
This contacting may take place in the margin region, for example. In one embodiment, this connection may be manufactured by contacts on planar polysilicon in the margin region, for example. For this purpose, when etching recesses, the polysilicon is covered by a resist mask at the locations at which contacting is to take place.
Thereupon, for contacting the source region of a transistor, an oxide removal is performed in the cell field to etch the oxide away to the top edges of the semiconductor mesa structures between the trenches so as to be able to deposit a source contact metallization.
Beyond this, contacting of the gate material, or the source electrode under the gate electrode, is performed in the margin region by opening the oxide above the planar conductive layer in the margin region.
By depositing metal material into this opening in the margin region, the planar conductive layer in the margin region and, thus, the gate electrode or, if applicable, the source electrode below the gate electrode may then be contacted.
A disadvantage to this procedure is that different processing steps for the cell field are necessary, that is, on the one hand for the active region and, on the other hand, for the margin region. Thus, when the cell field is initially processed, the margin region is being covered, so that an oxide removal in the cell field does not involve the margin region. Thereupon, if an oxide removal in the margin region is to take place, the active region is being covered. If the oxide is removed at the necessary locations both in the active region and in the margin zone, a common metallization may be performed.
This tep order is costly and, thus, expensive and disadvantageous particularly with regard to the danger of rejection, which may occur with every additional process step.
For these and other reasons, there is a need for the present invention.